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Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 6: Typical Quiescent Supply Current (Cont’d)
Speed Grade
Symbol
Description
Device
-3
-2/-2L
1.0V
-1
-1M
0.9V
-2L
Units
I CCAUX_IOQ Quiescent V CCAUX_IO supply current XC7K70T
XC7K160T
XC7K325T
XC7K355T
XC7K410T
XC7K420T
XC7K480T
XQ7K325T
XQ7K410T
N/A
2
2
N/A
2
N/A
N/A
N/A
N/A
N/A
2
2
N/A
2
N/A
N/A
2
2
N/A
2
2
N/A
2
N/A
N/A
2
2
N/A
N/A
N/A
N/A
N/A
N/A
N/A
2
2
N/A
2
2
N/A
2
N/A
N/A
2
2
mA
mA
mA
mA
mA
mA
mA
mA
mA
I CCBRAMQ
Quiescent V CCBRAM supply current
XC7K70T
XC7K160T
XC7K325T
XC7K355T
XC7K410T
XC7K420T
XC7K480T
XQ7K325T
XQ7K410T
6
14
19
31
34
41
41
N/A
N/A
6
14
19
31
34
41
41
19
34
6
14
19
31
34
41
41
19
34
N/A
N/A
N/A
N/A
N/A
N/A
N/A
19
34
6
14
19
31
34
41
41
19
34
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes:
1.
2.
3.
Typical values are specified at nominal voltage, 85°C junction temperatures (T j ) with single-ended SelectIO resources.
Typical values are for blank configured devices with no output current loads, no active input pull-up resistors, all I/O pins are 3-state and
floating.
Use the Xilinx Power Estimator (XPE) spreadsheet tool (download at www.xilinx.com/power ) to calculate static power consumption for
conditions other than those specified.
Power-On/Off Power Supply Sequencing
The recommended power-on sequence is V CCINT , V CCBRAM , V CCAUX , V CCAUX_IO , and V CCO to achieve minimum current
draw and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-
on sequence. If V CCINT and V CCBRAM have the same recommended voltage levels then both can be powered by the same
supply and ramped simultaneously. If V CCAUX , V CCAUX_IO , and V CCO have the same recommended voltage levels then they
can be powered by the same supply and ramped simultaneously.
For V CCO voltages of 3.3V in HR I/O banks and configuration bank 0:
?
?
The voltage difference between V CCO and V CCAUX must not exceed 2.625V for longer than T VCCO2VCCAUX for each
power-on/off cycle to maintain device reliability levels.
The T VCCO2VCCAUX time can be allocated in any percentage between the power-on and power-off ramps.
The recommended power-on sequence to achieve minimum current draw for the GTX transceivers is V CCINT , V MGTAVCC ,
V MGTAVTT OR V MGTAVCC , V CCINT , V MGTAVTT . There is no recommended sequencing for V MGTVCCAUX . Both V MGTAVCC and
V CCINT can be ramped simultaneously. The recommended power-off sequence is the reverse of the power-on sequence to
achieve minimum current draw.
If these recommended sequences are not met, current drawn from V MGTAVTT can be higher than specifications during
power-up and power-down.
DS182 (v2.8) March 4, 2014
Product Specification
www.xilinx.com
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